1. Technical Field
The present invention generally relates to computer systems, and more particularly to operating systems and hardware for performing Direct Memory Access (DMA) transfers.
2. Description of the Related Art
As computer systems have evolved, peripheral devices and subsystems coupled to the central processing unit (CPU) have likewise evolved. This evolution for peripheral devices has included the ability to direct and perform transactions with a connecting bus independent of CPU action. Direct Memory Access(DMA) controllers have also been provided in computer systems for off-loading transaction work from the CPU to a dedicated controller, in order to increase the availability of the CPU to perform computational tasks and other tasks that are slowed by the use of the CPU to perform input/output (I/O) transfers.
Computer systems typically provide at least one system bus and a system memory area that is predominantly used by one or more processors for computation and data manipulation. I/O is sometimes performed by the processor, but can be performed by DMA controllers that transfer data to and from devices into system memory. The DMA controllers free the processor from I/O tasks and usually perform transfers more efficiently. DMA transfers can also be performed by the devices themselves. This type of device is referred to as a xe2x80x9cbus masterxe2x80x9d because it is capable of acquiring a bus and transferring data directly to and from memory or devices located on the bus.
A DMA input device transfers data to memory or this transfer may be accomplished with the action of a separate DMA controller. A DMA output device transfers data from memory and the transfer may likewise be accomplished by the action of a separate DMA controller. The application software or device driver is able to perform data communication with the device by writing or reading the data to or from memory and signaling the device or DMA controller to perform the transfer.
A DMA transfer can also be performed from one device to another device using two discrete DMA transfers, one writing to memory and the second reading from memory. The input device data is transferred to system memory from the input device by a DMA controller or by the input device if it is a bus master. This is often referred to as a DMA write, because the data is being written to system memory. The output device data is then transferred from system memory to the output device by a DMA controller or the output device if it is a bus master. This is often referred to as a DMA read because system memory is being read. The data is usually modified by the processor after the DMA write and before the DMA read, while the data is located in system memory. Because the format of data for different devices is generally dissimilar, the processor intervenes to reformat the data. Thus the processor must be able to access the data in order to for example, read an image from an image scanner and save that image to disk in a different format.
In some cases, formatting may only require the addition of some header information, for example, a TIFF (Tagged Image File Format) compatible scanner may produce an almost complete TIFF file, without record information required at the header of the file. In this case, information must be added to the image in memory. Or, for another example, a network adapter might transfer fileoriented data that could be saved to a storage device, but information at the start of the data might be associated with the transfer and should not be stored. In this case, information must be removed from the memory image that is transferred to the storage device.
DMA input and output place a bandwidth burden on a computer system, in that the DMA transfers take up a portion of the available system bus bandwidth, which reduces the amount of access the processor has to memory and other devices, reducing computer system performance. The buffer also ties up a portion of system memory, making it unavailable for use by other processes during the transfer. Memory can be located on buses other than the global system bus, but this is not typically used for DMA transfers because applications or drivers do not have information about this memory, the memory may be optionally attached and the operating system does not provide flexibility to handle this optional connection when allocating DMA buffers, or the device or devices involved in a DMA transfer may not be able to access a particular memory.
Operating system services for allocating DMA buffers typically allocate global system memory for this purpose, locking an area so that a DMA controller or bus master may perform read or write transfers into a buffer. Because the operating system services for allocating DMA buffers must treat the general case, global system memory is used for these transfers.
It would therefore be desirable to improve computer systems and operating system software so that DMA transfers from device to device do not reduce processor throughput and available global system memory. It would further be desirable to provide these improvements in such a fashion that device to device transfers can be accomplished while allowing a processor to modify the data being transferred.
It is therefore one object of the present invention to provide an improved computer system that can transfer data from input device to output device without using global system memory.
It is another object of the present invention to provide such an improved computer system that can optionally utilize global system memory for the data transfer if local memory, including on-board adapter memory, is not available.
It is another object of the present invention to provide such a computer system wherein a processor can modify the data that is transferred from an input device to an output device.
The foregoing objects are achieved in a method for performing DMA transfers in a computer system having global system memory, a system bus, and at least one processor that determines that local memory coupled to a local bus is available with a degree of efficiency with a first device, and if local memory is available, allocating a buffer from it and transferring data between the buffer and the first device. The method may further receive a request for allocation of a DMA buffer containing a first affinity level corresponding to the first device and the degree of efficiency can be determined in conformance with the first affinity level. The method may further determine that the local memory has a second degree of efficiency with a second device and transfer data between the second device and memory. The method may further include modifying the data after a transfer from the first device and before the transfer to the second device.
The local memory may be memory coupled to a local bus separated from the system bus by a bridge and coupled to the first and second devices, and the determination of efficiency may be based on a determination of these connections. The method may further deallocate the buffer after the transfer to the second device. The devices may be bus masters or the method may use DMA controllers and the method may be performed in response to receiving a request for a DMA buffer.
The method may be embodied in a computer system including means for performing each of the steps of the method or in a computer program product with media containing program instruction for execution in a computer system for performing the steps of the method.
The above as well as additional objectives, features, and advantages of the present invention will become apparent in the following detailed written description.